Please use this identifier to cite or link to this item: http://dspace.dtu.ac.in:8080/jspui/handle/repository/698
Title: QUASI-CYCLIC GENERALIZED LDPC CODES WITH GOOD DECODING THRESHOLD AND LOW ERROR FLOORS”
Authors: LAL, KANHAIYA
Keywords: LDPC
GOOD DECODING
FLOORS
Issue Date: 16-Jan-2009
Series/Report no.: TD 500;52
Abstract: Tanner codes represent a broad class of graph-based coding schemes, including low-density parity-check (LDPC) and turbo codes. Whereas many different classes of LDPC and turbo codes have been proposed and studied in the past decade, very little work has been performed on the broader class of Tanner codes. In this major project work, a novel methodology for designing structured generalized LDPC (G-LDPC) codes is presented. The proposed design results in quasi-cyclic G-LDPC codes for which efficient encoding is feasible through shift-register-based circuits. The structure imposed on the bipartite graphs, together with the choice of simple component codes, leads to a class of codes suitable for fast iterative decoding. A pragmatic approach to the construction of Generalized-LDPC codes is proposed. The approach is based on the substitution of check nodes in the protograph of a low-density parity-check code with stronger nodes based, for instance, on Hamming codes. Such a design approach...
Description: ME THESIS
URI: http://dspace.dtu.ac.in:8080/jspui/handle/repository/698
Appears in Collections:M.E./M.Tech. Electronics & Communication Engineering

Files in This Item:
File Description SizeFormat 
ME+Thesis.doc696.5 kBMicrosoft WordView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.