DESIGN AND PERFORMANCE ANALYSIS OF GATE ALL AROUND NANOWIRE FET FOR SUPPRESSION OF SHORT CHANNEL EFFECTS

Abstract

The continual scaling of the semiconductor devices into the nanoscale regime has brought various issues in conventional planar MOSFET architectures. To mitigate these restrictions, new transistor topologies like Junctionless and Gate-All-Around (GAA) transistors have emerged as intriguing options for future nanoscale semiconductor applications. Among the emerging device architectures, Junctionless Device and multi-gate transistor structures have attracted considerable attention due to their superior electrostatic character istics and improved scalability. In these devices providing stronger control over the move ment of charge carriers and reducing undesirable short-channel effects. The combination of this surrounding-gate configuration with a junctionless architecture offers an effective approach for enhancing device performance while simplifying fabrication complexity. This work presents a detailed comparative study of Junctionless device employing different semiconductor channel materials and Proposed device structures were designed and ana lyzed using the SILVACO ATLAS 3D TCAD simulation platform. To ensure a fair com parison, identical geometrical dimensions, doping concentrations, and biasing conditions were maintained for all simulated devices [1]. The cylindrical GAA construction offers upgraded electrostatic since the gate electrode en velops the channel region, hence minimizing leakage current and suppressing short channel effects. The junctionless architecture also simplifies the manufacturing by avoiding abrupt source and drain junctions by homogeneous doping throughout the device structure. A comprehensive evaluation of the selected semiconductor materials was carried out by extracting key electrical performance parameters, including Vth, SS, DIBL , ION, OFF, and the on off current ratio. The simulation results indicate that devices based on GaAs and InP exhibit enhanced current conduction capability and faster switching behavior owing to their high carrier mobility. In contrast, GaN-based devices demonstrate excellent leakage suppression and energy-efficient operation because of their wide bandgap characteristics. Silicon-based devices provide a balanced combination of performance, stability, and com patibility with existing semiconductor manufacturing technologies [5]. The comparative investigation shows that the suggested CGAA-JLFET architecture exhibits better electrostatic integrity, lower short channel effects and better switching performance.