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http://dspace.dtu.ac.in:8080/jspui/handle/repository/22522| Title: | DESIGN AND PERFORMANCE IMPROVEMENT OF GALLIUM NITRIDE HIGH ELECTRON MOBILITY TRANSISTORS FOR POWER ELECTRONICS APPLICATIONS |
| Authors: | GARG, TANVIKA |
| Keywords: | POWER ELECTRONICS APPLICATIONS GALLIUM NITRIDE HIGH ELECTRON MOBILITY TRANSISTORS GaN HEMTs |
| Issue Date: | Dec-2025 |
| Series/Report no.: | TD-8416; |
| Abstract: | Gallium Nitride High Electron Mobility Transistors (GaN HEMTs) have emerged as a pivotal technology in power electronics due to their superior material properties, including a wide bandgap, high electron mobility, and excellent thermal stability. Despite their advantages, key challenges such as gate leakage current, breakdown voltage limitations, and high on-resistance hinder their widespread adoption in high-power applications. This thesis systematically presents novel structural and material engineering approaches to optimize GaN HEMTs for high performance in power electronics applications. In this thesis, we have designed novel device design techniques for GaN HEMT to improve performance by minimizing gate leakage current, reducing on-resistance, and enhancing breakdown voltage. To reduce gate leakage current, we have introduced MIS and p-GaN structures, Gaussian-doped p-GaN HEMT, and Omega (Ω)-shaped gate p-GaN MIS-HEMT. Additionally, we have presented p-GaN HEMTs with an AlInN/AlN/GaN double heterostructure and an InAlGaN back-barrier to improve on-resistance, as well as stepped AlGaN hybrid buffer GaN HEMTs to enhance breakdown voltage. We have also investigated an analytical model to examine the effects of buffer traps on 2DEG density and gate leakage current, particularly at cryogenic temperatures. To suppress gate leakage current, an enhancement-mode GaN HEMT with an MIS and p-GaN structure has been designed. By integrating a high-k HfO₂ dielectric layer, this device reduces tunneling effects and improves the threshold voltage while maintaining high drain current performance. In addition, we have introduced a Gaussian-doped p-GaN that incorporates a controlled doping profile in the GaN channel to minimize electric field variations. This approach significantly reduces gate leakage current while improving transconductance and current drive capability. Furthermore, an Omega (Ω)-shaped gate has been introduced in p- GaN MIS-HEMT, demonstrating a significant reduction of gate leakage, enhanced breakdown viii voltage, and improved reliability. This is achieved through optimized dielectric stress distribution. The on-resistance has been reduced by implementing a p-GaN HEMT with an AlInN/AlN/GaN double heterostructure and an InAlGaN back-barrier. The AlInN/GaN interface increases 2DEG density, improving current handling, while the InAlGaN back-barrier confines electrons, enhancing efficiency. Breakdown voltage and BFOM are enhanced by integrating a stepped AlGaN hybrid buffer into the p-GaN HEMT. The optimized lower aluminum concentration reduces surface defects, improves breakdown voltage, and decreases leakage current. The design outperforms conventional HB-HEMTs with higher breakdown voltage, improved BFOM, enhanced transconductance, and lower small-signal capacitances. We have developed an analytical model to examine buffer trap effects and cryogenic temperature on 2DEG density and gate leakage in p-GaN HEMT. It incorporates thermionic emission, Poole-Frenkel emission, and thermally-assisted tunneling to describe leakage mechanisms and analyzes buffer trap influence on Schottky barrier potential drop and electric field distribution. The findings offer key insights for optimizing device structures to suppress leakage current. The proposed device architectures have been extensively validated using numerical simulations, ensuring their feasibility for real-world power electronics applications. The findings of this thesis contribute to the ongoing evolution of GaN HEMT technology, providing a strong foundation for future research in high-efficiency, high-reliability power semiconductor devices. |
| URI: | http://dspace.dtu.ac.in:8080/jspui/handle/repository/22522 |
| Appears in Collections: | Ph.D. Electronics & Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| TANVIKA GARG Ph.d.pdf | 5.38 MB | Adobe PDF | View/Open | |
| TANVIKA GARG Plag.pdf | 26.03 MB | Adobe PDF | View/Open |
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