STUDY AND SIMULATION OF VCII+ AND ITS APPLICATIONS

Abstract

In this project, simulation of an analog block “Second Generation Voltage Conveyor” has been implemented at 180nm technology node. Technology node has been reduced in order to reduce the area requirement in such a way to improve its characteristics. Static Power dissipation is also getting reduced because of reduction in Mosfet sizes and Supply Voltages. Delay also reduces with reduction in Technology Node and Supply Voltages In the end, simulation work has been carried using this block in applications like Amplifier, Integrator, Differentiator, V to I convertor, Voltage Buffer and Current Buffer to check the transient and frequency response of these applications. The performance of all the designs is investigated through extensive Cadence Virtuoso simulations using 180nm technology node and 0.9volt Power Supply.