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DC Field | Value | Language |
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dc.contributor.author | YADAV, SNEHLATA | - |
dc.date.accessioned | 2024-08-05T08:26:55Z | - |
dc.date.available | 2024-08-05T08:26:55Z | - |
dc.date.issued | 2024-05 | - |
dc.identifier.uri | http://dspace.dtu.ac.in:8080/jspui/handle/repository/20686 | - |
dc.description.abstract | The mid-20th century marked the beginning of the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) era. The invention of the MOS (Metal-Oxide-Semiconductor) capacitor laid the groundwork for the MOSFET. Lilienfeld, a physicist, patented the concept of a field-effect transistor-like device based on a thin layer of semiconductor material in the 1920s [1]. Lilienfeld's work, however, remained purely theoretical. In the late 1950s, researchers began investigating the electrical properties of MOS capacitors [2]. M. Atalla and D. Kahng, physicists at Bell Laboratory, made substantial contributions to the invention of the MOSFET in 1959 [3]. They established the viability of fabricating a functional MOS capacitor by depositing a thin silicon dioxide (SiO2) layer on a silicon substrate and using metal connections. They also observed current flow control across the oxide layer by applying a voltage to the metal gate. Later in 1963, Chih-Tang Sah and Frank Wanlass at Fairchild Semiconductor introduced the planar MOSFET [4]. The planar MOSFET used a more feasible structure, including a metal gate, a thin oxide layer, and a p-n junction beneath the channel region. This design enabled better device characteristics such as lower power consumption and faster switching speed. Throughout the 1960s and 1970s, researchers and engineers achieved substantial advances in MOSFET technology. During this time, notable advances included the advent of complementary MOS (CMOS) logic, which used both n-channel and p-channel MOSFETs for improved power efficiency and noise immunity [5]. Furthermore, scaling down MOSFETs, resulting in reduced transistor size and higher integration density, became a major focus. | en_US |
dc.language.iso | en | en_US |
dc.relation.ispartofseries | TD-7173; | - |
dc.subject | FERROELECTRIC FIELD | en_US |
dc.subject | TRANSISTOR | en_US |
dc.subject | MOSFET | en_US |
dc.title | DESIGN, ANALYSIS, AND MODELING OF FERROELECTRIC FIELD EFFECT TRANSISTOR | en_US |
dc.type | Thesis | en_US |
Appears in Collections: | Ph.D. Electronics & Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
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Snehlata Yadav Ph.D..pdf | 5.66 MB | Adobe PDF | View/Open |
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