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Title: | DESIGN AND PERFORMANCE ANALYSIS OF NOVEL CURRENT COMPARATOR BASED ON EXTREMELY LOW VOLTAGE HIGH COMPLIANCE CURRENT MIRROR |
Authors: | MONIKA |
Keywords: | NOVEL CURRENT COMPARATOR CURRENT MIRROR BDQFG FVF CM ELVHC CM |
Issue Date: | Jul-2021 |
Series/Report no.: | TD-6999; |
Abstract: | This thesis presents the novel structure of the current comparator which embraces the Extremely Low-Voltage High-Compliance Current Mirror (ELVHC CM) as the current differencing stage. The current comparator is a elementary unit of current mode applications. Their performance is found better than the voltage comparator in the literature. In the literature, the very first current comparator shows the 10 ns delay with higher resolution. Later many designs were proposed with specific advantages per application. In the current comparator, the current mirror (CM) plays a crucial role. CM provides the current differences that have to be measured. In this thesis, six types of CM have been discussed, analyzed, and simulated. Name of all these CMs are Simple current mirror, Wilson current mirror, Improved Wilson current mirror, Cascode current mirror, ELVHC CM, and BDQFG FVF CM. The first four CMs are the basic types of CM structures and the remaining two CMs are the advanced topology of CM. The significant parameters of CM which describe the overall performance of CM are Current transfer characteristics, PER, Compliance voltage, Bandwidth and input/output resistance. For basic CM structures i.e. Simple current mirror, Wilson current mirror, Improved Wilson current mirror, and Cascode current mirror, Current transfer characteristics, PER, Compliance voltage, and output resistance. All these basic four current mirror structures have been simulated on various technology nodes such as CMOS 180 nm, 90 nm, 45 nm, and FinFET 18 nm on the Cadence Virtuoso simulator and then compared based on technology node and the topology. If a comparison of basic four CM has seen technology-wise then 180 nm shown better performance among all technology nodes. Whereas, Simple CM shows 11.25% of PER for 180 nm technology node while 74.62% of PER is observed for 90 nm technology node, 12.58% for 45 nm, and 13.17% for FinFET 18 nm. Similarly, 0.1 V output compliance voltage is observed for all technology node of Simple CM and 45 nm technology node Simple CM depicted 199 MΩ output resistance which is greatest among all technology node pf Simple CM. Talking about Wilson CM 180 nm technology node shown best performance among all technology nodes as -16.17% of PER is spotted. Furthermore, minimum compliance voltage 0.2 V is seen for 90 nm technology node, and 168 MΩ of highest resistance is noticed for FinFET 18 nm technology node of Wilson CM. Improved Wilson CM experience similar v resistance as Wilson CM for all technology nodes. While mirroring accuracy is found quite similar of Improved Wilson CM and Cascode CM. But for Cascode CM 180 nm technology node shown lower output resistance and higher compliance voltage which is not good in practice, although FinFET Cascode CM depicted 293 MΩ of output resistance. Afterward, two advanced current mirrors named ELVHC CM and BDQFG FVF CM are discussed, analyzed, and simulated on Cadence Virtuoso Simulator. Their small signal analysis has been done with mathematical equations and Monte Carlo analysis is also carried out. Transfer characteristics, PER, and Output compliance voltage are calculated for these two CMs. Moreover in BDQFG FVF CM, bulk driven quasi floating gate and flipped voltage follower techniques and their working as been discussed. Based on the comparison of both CM it is concluded the ELVHC CM is better than BDQFG FVF CM. Also, it is observed that at 200 μA input current ELVHC CM depicted 0.03% of PER. Moreover, BDQFG FVF CM shown 0.12 V of minimum output compliance voltage while ELVHC CM presents 0.091 V. In conclusion, it is noticed that ELVHC CM’s performance is better than BDQFG FVF CM. Based on this statement a novel design of the current comparator has been proposed which comprises ELVHC CM as a current differencing stage. To find out the workability of the proposed design, a new proposed comparator is analyzed and simulated on a 180 nm technology node and compared with BDQFG FVF CM based current comparator. Where, majorly three parameters are calculated such as propagation delay, power, and PDP. It is noticed that both comparators have a resolution of 5 nA. Further, the proposed design depicts 74.2% and 30.2% propagation delay and power dissipation respectively less than BDQFG FVF CM based comparator. All these analyses show that the current comparator based on ELVHC CM’s performance is superior. |
URI: | http://dspace.dtu.ac.in:8080/jspui/handle/repository/20444 |
Appears in Collections: | M.E./M.Tech. Electronics & Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
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MONIKA M.Tech..pdf | 850.88 kB | Adobe PDF | View/Open |
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