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DC Field | Value | Language |
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dc.contributor.author | SHARMA, SANJEEV | - |
dc.date.accessioned | 2023-07-11T06:04:40Z | - |
dc.date.available | 2023-07-11T06:04:40Z | - |
dc.date.issued | 2023-05 | - |
dc.identifier.uri | http://dspace.dtu.ac.in:8080/jspui/handle/repository/20028 | - |
dc.description.abstract | This thesis presents a thorough examination of power factor corrected converters, with a specific focus on five distinct topologies: Boost PFC Converter, ILDB PFC Converter, SBBPFC, BLSB PFC Converter, and TTMPB PFC Converter. The primary aim of this study is to assess and compare the performance of these converters in relation to power factor correction, efficiency, and other relevant parameters. The initial portion of the thesis provides an overview of power factor correction techniques, emphasizing the significance of achieving a high-power factor in modern power electronic systems. It discusses the limitations of conventional rectifiers and emphasizes the necessity for PFC converters to adhere to regulatory standards and enhance overall system efficiency. Finding ways to enhance the input current (Iin) waveform while preventing phase displacement has occupied a significant portion of power electronics research over the past two decades. Choosing the two most important 1- phase Power Factor Correction (PFC) topologies is the thesis’s main goal. The Boost PFC Converter and the ILDB PFC converter are the investigated topology under the performance. In Simulink/MATLAB, the all investigated topologies performances are simulated. Additionally offered are efficiency evaluation and loss analysis. The simulation outcomes show that the BPFC converter topology with interleaved boost exhibits a somewhat greater efficiency. This innovative interleaving method optimizes CRM for each step. accurate 180-degree phase shift and natural current sharing. The subsequent sections concentrate on each individual converter topology. Each topology is elaborated upon in detail, encompassing its operating principle, control strategy, and critical design considerations. Mathematical models for each converter are derived, and simulation models are constructed to analyse their steady-state and dynamic characteristics. The simulation outcomes are validated through experimental tests conducted on prototype hardware. A comparative analysis is carried out to evaluate the performance of the various PFC converter topologies. Parameters such as power factor, total harmonic distortion (THD), efficiency, and component stresses are considered in the comparison. Furthermore, the impact of load conditions and input voltage variations on converter performance is iv investigated. Through the analysis and comparison, the strengths and limitations of each converter topology are identified. The findings provide valuable insights into the suitability of these converters for diverse applications, while taking into account factors such as cost, complexity, efficiency, and power density. Lastly, recommendations are provided to aid in the selection of the most appropriate PFC converter topology based on specific application requirements. This study contributes to the existing knowledge by delivering a comprehensive analysis and comparison of five distinct PFC converter topologies, thereby facilitating well-informed decision-making in the design and implementation of power factor correction solution. | en_US |
dc.language.iso | en | en_US |
dc.relation.ispartofseries | TD-6564; | - |
dc.subject | POWER FACTOR | en_US |
dc.subject | PFC CONVERTER | en_US |
dc.subject | CORRECTION TECHNIQUES | en_US |
dc.subject | TOPOLOGY | en_US |
dc.title | ANALYSIS OF DIFFERENT POWER FACTOR CORRECTED CONVERTERS | en_US |
dc.type | Thesis | en_US |
Appears in Collections: | M.E./M.Tech. Electrical Engineering |
Files in This Item:
File | Description | Size | Format | |
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SANJEEV SHARMA MTech.pdf | 2.7 MB | Adobe PDF | View/Open |
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