Please use this identifier to cite or link to this item: http://dspace.dtu.ac.in:8080/jspui/handle/repository/19763
Title: ANALYSIS, DESIGN AND IMPLEMENTATION OF DIGITAL CONTROL LOOP BASED ON TMS320F2812 DSP FOR BUCK AND SINGLE INPUT MULTI OUTPUT BOOST CONVERTER IN VOLTAGE CONTROL MODE
Authors: JINDAL, VANSHIKA
Keywords: DIGITAL CONTROL
TMS320F2812 DSP
BOOST CONVERTER
DC-DC CONVERTERS
SIMO BOOST
Issue Date: May-2022
Series/Report no.: TD-6324;
Abstract: DC-DC power converters play an important role in powering telecom and comput ing systems. With the speed improvement and cost reduction of digital control, digital controller is becoming a trend for DC-DC converters in addition to existed digital moni toring and management technology. Design and implementation of digital controllers for a buck and SIMO Boost converters using linear control methods are investigated in this thesis. The small signal analysis of an ideal and non ideal Buck and SIMO Boost is being obtained using standard state space averaging techniques. Analog PI controllers were designed for generic DC-DC converters using different PI tuning rules and compensator design using frequency response considering stability. The digital control loop is designed and implemented using Direct and Indirect design approaches using various discrete con version methods such as Forward euler, Backward euler and Tustin approximations. The validity of the non-isolated DC-DC converter with ratings 45W, 15V, 3A for SIMO Boost converter at 50 kHz frequency and 18W,12V, 1.5A for Buck converter at 20 kHz switching frequency are verified by simulations and experimental results for closed loop operation under variation in input voltage and load. Control algorithms using PI and Fuzzy-Sugeno controller are implemented using Texas Digital Signal Processors - TMS320F2812 and MATLAB/Simulink (version 2021b) platform has been utilized for simulation purpose. Limitations of practical implementation of digital control on DC-DC converters which includes the digital PWM resolution (limit cycles), the ADC sampling delay and limited control bandwidth of digital compensator is also discussed in this thesis.
URI: http://dspace.dtu.ac.in:8080/jspui/handle/repository/19763
Appears in Collections:M.E./M.Tech. Electrical Engineering

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