REALIZATION OF VDCC BASED PI, PD AND PID CONTROLLER

Abstract

The presented work deals with Voltage differencing current conveyor (VDCC) and its use in analog circuit design. Several major developments have been take place in the area of analog circuits over the last few decades. Ever since the introduction of current conveyor as basic building blocks in analog circuit designs, there is a bulk of material available about various current mode analog building blocks developed past current conveyor. For circuit design, Voltage Differencing Current Conveyor has emerged as quite versatile and flexible analog building block among diverse modern active building blocks. The Voltage Differencing Current Conveyor (VDCC) having the features of two very basic and important analog building blocks, a current conveyor of second generation (CCII) and an operational transconductance amplifier (OTA). This current mode VDCC has higher usable gain, higher frequency range of operation, small power consumption, higher slew rates, improved linearity, and better accuracy. Current mode approach is not only limited to current processing but also offers important advantages when interfacing with a voltage mode type circuit. The Voltage differencing current conveyor (VDCC) is an active building block that provides electronic tunability of transconductance gain in addition to that it also transfers both current and voltage in its related terminals, perfectly for the designing of various active filters, inductor, simulators and controllers. In this project an attempt has been made to highlight the realization of VDCC active building and its application as PID controller. . Initially AC and DC characteristic of VDCC has been studied and then PID Controller output is realized. In the proposed circuit, the bias current variation is used for electronic tunability of the proportional gain constant, integral time constant and Derivative time constant. Grounded passive elements such as Resistors and Capacitors are used which makes it perfectly suitable for on-chip implementation. The validity of the circuit is verified by PSPICE simulations using 0.18µm TSMC CMOS technology parameters.