DESIGNING OF 2:4 DECODER USING DIFFERENT LOGIC STYLES

Abstract

Decoders are combinational circuits that convert binary information into 2N output lines. N input lines are used to transfer the binary information. The binary information is encoded in a 2N-bit code on the output lines. When the decoder is activated, one of these outputs will be active High dependent on the mix of inputs present. That is, the decoder recognises a certain code. When the decoder is activated, the decoder's outputs are nothing more than the min terms of 'n' input variable lines. In this project, I have designed and implemented 2:4 decoder using different logic styles such as Complementary MOS (CMOS) Logic, Transmission Gate Logic (TGL) and Pass-transistor Dual Value Logic (PDVL) using LTspice software. I have also designed two modified circuits of 2:4 decoder using the same software. A comparative study of the five different circuits is represented based on their area (in terms of number of MOSFETs), average energy and propagation delay. Simulations are done at 1.8V for 180nm and 90nm technology nodes and at two different temperatures i.e. 27C and 120C.