EFFICIENT 16x16 VEDIC MULTIPLIER USING VARIOUS ADDERS

Abstract

We live in an era of artificial intelligence which leads to lots of automation for the betterment of life and society.Semiconductor industries, makes the way for bigger solution for people and which brings the technology to audience ranging from common people to stalwarts in the means of smallest components as sensors, mobiles, laptop to bigger components as data centers. As technology is evolving and increasing demand of the technologies and the evolution of the products and the giants of semiconductor industries like Intel, Texas, Samsung, Qualcomm and Western Digital are finding their way in a best possible way to design the product which is user friendly. There are various constraints which are implemented, which are imposed by these industries like functionality of the electronic device, power dissipation by the product, area occupied and also the reliability of the product. All these constraints, require some special attention and the measurements, which needs to be fulfilled by the design engineers, so that the reputation of the industry, andthe competition in the products will be sustained. The electronic devices process the digital signals and process here is nothing but the Addition, Subtraction and Multiplication which are some Arithmetic operations. To make devices faster either we can go for better technology in terms of MOS that is having lesser feature size or make the Arithmetic operations more efficient. Here in this thesis we focus on the latter part. In this thesis we look into both Multipliers and Adders, in multipliers we focus on three techniques. While in Adders we look into both logical and circuit design styles of adder and know the best possible combination of the adder we can use.