DESIGN OF LOW POWER TIQ FLASH ADC USING TANNER TOOL

Abstract

An internal reference comparator array consisting of complementary metal oxide semiconductor inverters replaces the Vref generator, resistor voltage divider circuit, as well as arrays of differential comparators in a standard flash ADC. The aforementioned design also promises significant improvements in chip space, power dissipation, and speed control because the inverters' threshold voltage acts as the reference voltage. Because the inverter threshold voltage is sensitive to operating temperature/process variations, perturbations in these ADC systems are challenging, necessitating a compensation mechanism. A TIQ-dependent flash ADC with inverter threshold voltage control is presented in this study.The 5-bit flash ADC is developed and evaluated in 180nm technology using TANNER EDA via modifying the TIQ comparator as well as using Power gated, as well as a multiplexer-oriented encoder using transmission gate logic as well as the lector technique. TIQ comparator as well as Multiplexer-based encoder are used in the architecture. The 2:1 multiplexer are used in this Mux-based encoder. The Multiplexer could be built in a variety of topology, including CMOS, PTL, TGL, as well as Gate Diffusion-Input. The transistor counts in CMOS technology, which is referred to as Area in electronics, is greater, resulting in increased energy usage and latency. Although there are fewer transistors in PTL as well as GDI logics than in CMOS, output stability also isn't maintained. In order to preserve output stability, buffers must be included to the PTL setup. However, the outcomes are insufficient. In order to retain output stability, GDI technologies should use the same algorithm or make certain essential tweaks. The purpose of this report is on Transmission Gate Logic, as well as the Multiplexer was designed using a lector method. Lector is a low-power technology. Inside the 2:1 multiplexing construction, this method is used with Transmission Gate Logic. The power gating method is used to create a TIQ comparator in this research. Another low-power option is power gating technique. Power gating is done in xi a variety of ways. The injection of an extra transistors at the Vdd connector (known as header switching energy gating) or the earth (GND) connections are used in power gating technology (which is named as footer switch power gating). The second transistor is positioned at the Vdd connector to minimize power dissipation when compared to the traditional technique.