BUS CONTROLLED AMBA 2.0 AHB2APB BRIDGE FOR SOC APPLICATION

Abstract

The AMBA (Advanced Microcontroller Bus Architecture) is an open SOC (System-on-Chip) bus protocol to strengthen the reusability of IP core, for high-performance buses to communicate with low-power devices by communication through the connection of different functional blocks (or IP), and using multiple controllers and peripherals, we can develop multiprocessor unit. This Research paper explains the implementation of AHB to APB Bridge. The bridge provides a communication interface between AMBA AHB v2.0 Masters and APB v2.0 slaves and parameterized data bus for AHB master and APB slaves. It supports transfers even when AHB transfer size and APB data bus width is not equal and AHB and APB interfaces work in separate independent clock domains. It has inbuilt cross-domain synchronization with parameterized number of synchronization stages. The design supports multi master and multi slave configuration. To perform functional and timing simulation, we are using System Verilog on Xilinx VIVADO Tool.