COMPARATIVE POWER ANALYSIS OF RISC PROCESSOR USING MACHINE LEARNING ALGORITHMS

Abstract

The exigency of automation and advancements ushers machine learning and artificial intelligence to expand it dimensionality into numerous domains like Internet of Things (IoT), Military, product and market analytics, language and sentiment analysis and Very Large Scale Integration of chips is also one of them. ML has started transuding as an significant application in the development and evolution of the Computer Aided tools and technologies that are involved in VLSI domain in the design of ASICs or FPGAs. The SoCs, Macros, IPs and Processors etc. otherwise would take large turnaround time to spin off as a final chip. As RISC Processors are being extensively used due to their less flexibility and high performance as compared to CISC Processors. We focused on the study, design and imposition of a RISC Processor on the Register Transfer Level (RTL) and apply machine learning algorithm to predict and analyze its power consumption. And also we compare which machine learning algorithm fits the power dataset of RISC Processor in the best possible manner in terms of the performance metrics. In the thesis, a 32-bit, MIPS based RISC Processor is implemented which supports basic Instruction Set Architecture (ISA) to perform few simple arithmetic computations like ADD, SUB, MUL etc. This processor is simulated using Xilinx VIVADO and its power is calculated and stored as a dataset under various input conditions often called as dataset features or attributes. The obtained power dataset is analyzed graphically to know on which factor different types of power majorly depends. Furthermore, machine learning algorithms are applied to obtain the classification report stating the accuracy, precision and recall on the power dataset of the RISC Processor to state which Machine learning algorithm is best fit for the Power dataset generated. In a nutshell, the thesis focuses on the application and relative analysis on performance metrics of machine learning algorithms on the power dataset of RISC Processor.