DESIGN OF A TERNARY DIGITAL TO ANALOG CONVERTER USING 3R-4R-6R LADDER NETWORK

Abstract

It was proven very early in the year 1964 that instead of base 2, the natural base (given by e=2.71828...) is the most efficient radix for the implementation of switching systems. The research also showed that base 3 rather than base 2 is the most efficient integral base for the implementation of digital systems. But despite that, binary technology (base 2) dominated the implementation of digital systems all over the world until recently. During the early 2000s it became clear that new methodologies were required to sustain the Moore‟s law and keep up the growth of processing power without increasing the number of transistors. This led to the recent implementations of ternary logic systems which had been neglected till now. The new ternary logic systems offered substantial power saving, reduced no. of transistors, increased processing power, reduction in delay and reduction in area. In this project we are going to design a Ternary Digital To Analog Converter Using 3R-4R-6R Ladder Network. We further implement a 10 Trit ternary DAC using this technique which has a 57 times better resolution than a binary 10-bit DAC. Simulation results of this circuit also indicate a very low total unsettled error of 0.047% of the Full Scale Reading. All simulations were performed using SYMICA DE software.