Please use this identifier to cite or link to this item:
http://dspace.dtu.ac.in:8080/jspui/handle/repository/18939
Title: | ACTIVE FILTER IMPLEMENTATION USING CURRENT MODE BLOCK |
Authors: | SHREYANSH |
Keywords: | FILTER IMPLEMENTATION CURRENT MODE BLOCK CURRENT CONVEYOR |
Issue Date: | Jun-2021 |
Series/Report no.: | TD-5520; |
Abstract: | One of the famous and fundamental building block that may be utilised in a variety of ways to perform various analog processing function is a Current Conveyor abbreviated as CC. Till date various researches has been made in this regards and various functionality like amplifier, filters etc can be achieved by using these devices. A Current Conveyor is a minimum three terminal devices but not limited to it. CC’s can be classified according to their generation. The current conveyor (CC) concept was first released in 1968 this is called as first generation of current conveyor and after two years in 1970 second generation has been developed and later on third generation of current conveyor is also developed, we will discuss about this in greater details in upcoming chapters.. Various other analog processing block also uses current conveyor as these primary block. The CFOA (current feedback opamp ) & CCII (second-generation current conveyor) are considered adaptable building blocks in analog current mode signal processing. One of the famous novel five-port analog building block that combine these two CFOA & CCII is OFCC (operational floating conveyor) and this may be used for a variety of applications. It combines the functions of a current feedback op-amp & a current conveyor in one package. This thesis shows the implementation of OFCC block as universal current mode device which can be used in realization of various functions where earlier an operational amplifier were used. Further it also shows the implementation of active biquad filter using new OFCC Block in a) TAM (Trans Admittance Mode) b) VM (Voltage mode) c) TIM (Trans Impedance Mode) d) CM (Current Mode). The OFCC block and amplifier is implemented in CMOS 90nm and 130nm technology node and later filter has been implemented on CMOS 130nm technology node by using software Symica DE. For low voltage applications and to minimize power consumption it uses single supply of 0.4 V. Various plots for OFCC block, amplifier and filter are also present in this thesis. |
URI: | http://dspace.dtu.ac.in:8080/jspui/handle/repository/18939 |
Appears in Collections: | M.E./M.Tech. Electronics & Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Shreyansh_MTech_Final_Thesis.pdf | 2.39 MB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.