IMPLEMENTATION OF ANALOG SINGAL PROCESSING/ GENERATION CIRCUITS USING MODERN ACTIVE BUILDING BLOCKS

Abstract

Conclusions In Chapter 2, we have presented single output OTA-based MISO type universal biquad lters. The rst OTA-C universal biquad lter employs ve OTAs and two grounded capacitors. The presented biquad lter con guration can provide all ve generic lter functions by appropriate choice(s) of input voltages. The proposed lter circuit o ers orthogonal electronic tunability of pole frequency and BW. Sensitivity of pole frequency with respect to transcondutors and capacitors has been evaluated and found to be less than half. However, this circuit requires an additional OTA (voltage inversion) to obtain LPF function. To overcome this limitation, we have also proposed two VM universal biquad lter circuits employing only four single output OTAs with two grounded capacitors. The presented circuits have orthogonal electronic tunability of pole frequency and pole quality factor. An exemplary CMOS OTA, implemented in 180nm TSMC technology parameters, has been used to validate the proposed biquad lter circuits. Simulation results such as frequency reponses, Monte-Carlo simulations and noise analysis using PSPICE have been performed to check the workability of the proposed circuits. We have also made the complete layout design for one of the presented circuits using Cadence Virtuoso simulations tool. Various checks such as design rule check, layout versus schematic check in analog design enviroment have been performed and the prelayout and post 233 layout simulation results have been pesented. Finally, a mixed mode universal biquad lter employing ve OTAs and two grounded capacitors has also been presented in this chapter. The mixed mode lter con guration realizes all ve lter functions in all four modes i.e., voltage mode, current mode, transresistance mode, and transconductance mode. The proposed mixed mode universal lter circuit has orthogonal electronic tunability of pole frequency and BW while, the pole frequency and pole quality factor of the presented biquad lter circuit can be independently tuned through the transconductane of various OTAs. Non-ideal analyses have also been performed to determine the e ect of parasitic on lter parameters. The active and passive sensitivities evaluated for this mixed mode biquad lter circuit are found to be not more than 1. Monte-Carlo analysis and noise analysis have also been carried out to check the robustness of the proposed lters. The workability of the proposed mixed mode lter con guration has been validated using Cadance Virtuoso simulations tool employing CMOS OTA achitecture and MATLAB simulations. The main contributions made in Chapter 3 can be summarized as follows: Four new con gurations of TOQSOs employing three OTAs and three capacitors have been presented. The CO and FO of the proposed TOQSO circuits have independent electronic control and also have quadrature output voltages and quadrature output currents. Out of the four TOQSOs, two circuits have capacitor control of FO, a feature, useful in capacitive transducers. Finally, we have proposed two new TOQSOs using a systematic methodology (a closed loop circuit employing a second order LPF in a forward path and a lossless inverting integrator in the feedback loop) having fully decoupled control of CO and FO. The proposed circuits employ four OTAs and three grounded capacitors. Non-ideal analysis, PSPICE simulations and experimental results for di erent circuits proposed in this chapter have been presented. 234 In Chapter 4, after classifying the realization methodologies of the previously proposed third order sinusoidal oscillator circuits, we have proposed three new approaches for systematic realization of third order sinusoidal oscillators (including minimal realization of low frequency third order sinusoidal oscillators). Two of the proposed approaches are based on the use of inverse lters while the third approach is network synthetic in nature. The rst approach using inverse lters, uses a rst order inverse HPF in cascade with a conventional lossy and lossless integrator in a unity feedback loop to synthesize TOQSO circuit while, in the second approach, second order inverse HPF in cascade with a conventional lossless integrator in a unity feedback loop has been used. The realized circuits have independent control of CO and FO. Exemplary implementations of TOQSOs based on both the approaches using CFOAs have been presented. The network synthetic approach, on the other hand, is based on determination of the short-circuit admittance matrix of an autonomous three-port, whose characteristic equation represents the characteristic equation of a low frequency third order sinusoidal oscillator with independent control of CO and FO. Twelve matrices, out of which four matrices are distinct, have been derived using which third order low frequency sinusoidal oscillator circuits having independent control of CO and FO with di erent resistors employing canonic number of resistors (04) and grounded capacitors (03). Minimal realizations of low frequency third order sinusoidal oscillators employing three CFOAs, four resistors and three grounded capacitors have been presented to verify the theoretical propositions. Two of the proposed structures have quadrature relationship between output voltages. To establish the workability of all the proposed oscillator circuits, experimental results using o -the-shelf commercially available IC AD844 type CFOAs have been presented In chapter 5, we have proposed new circuit realizations of analog divider, analog square root and analog multiplier/divider circuits employing single OTA and single CFOA. The proposed OTA based VM analog divider circuit employs an OTA and two MOS- 235 FETs (operating in triode region). The divider circuit has two quadrant mode of operation.The e ects of mismatch in the thrsehold voltages of di erent MOSFETs, aspect ratio of di erent on the performance of the divider circuit have been determined analytically. We have also considered the e ect of variation in the external D.C. power supply voltage on the output voltage of the circuit and proposed a design using which these e ects can be mimimized. Performance of the circuit at high frequencies has also been evaluated. The presented divider circuit can also be used as analog inverse function generator in which the output voltage can be electronically controlled through transconductance of the OTA. A VM analog square root circuit with a single OTA and single MOSFET has also been proposed. As the last contribution in this chapter, a single CFOA based VM analog multiplier/divider circuit with four MOSFETs has also been proposed. Both the functions can be obtained from the same con guration without any structural change. The multiplier circuit has four quadrant operation whereas the divider circuit supports two quadrant operation. Application examples of analog multiplier circuit as amplitude modulator, frequency doubler and squarer have been presented. The workability of the proposed analog multiplier/divider circuit has been veri ed using CMOS CFOA. Various analyses viz. mismatch analysis, PVT analysis, Monte- Carlo analysis have also been performed using PSPICE simulation tool and included to support the theoretical propositions.