IMPLEMENTION OF LOW POWER VDBA AND ITS APPLICATION

Abstract

This desertion is about designing low-voltage low- power (LVLP) analog VDBA by utilizing new device Dyanmic threshold MOSFET (DTMOS). During the past few years demand for high-performanceand low-power digital systems has grown rapidly. Severalfactors have contributed to this fast growth. First, laptopand notebook computers, and personal communication systemshave gained popularity. Consequently, portable applicationsthat traditionally required a modest performance (such as wristwatches and calculators), are now dominated by devices that demand a very high performance. The demand for portabilityof these new systems limits their battery weight and size,placing a severe constraint on their power dissipation. Second,speed, density, and size of non-portable CMOS based systemshave increased considerably in recent years. Thus, powerconsumption that was not a concern in these systems, is nowbecoming a critical parameter.New devices and Gadgets such as; smart wearable’s, long-term physiological monitoring, and handheld devices need to be small and lightweight. In addition to this long life battery is necessary for these devices. DTMOShas proved to be effective for reducing the voltage supply of the circuit towards threshold voltage of the MOS Transistor Here significant features of the DTMOS have been discussed in detail and the DTMOS is utilized to implement LV structure of Voltage differencing buffer amplifier (VDBA). Also be verify the performance of the proposed structure, it was utilized in realizing application. The output of the proposed active device and its application was done through PSPICE simulation using 0.18μm CMOS technology.