DESIGN AND ANALYSIS OF LNA FOR 2.4 GHZ ISM BAND USING 0.13 µm CMOS TECHNOLOGY

Abstract

Due to rapid developments in communication industry, the requirement of more and different kinds of wireless communication systems has increased. It is desired that these wireless communication systems have characteristics such as low noise figure, low input/output return losses, a high IIP3 and, low power consumption. The main aim of the manufacturers of the wireless communication systems is to achieve low power. In these wireless communication systems, the RF front-end circuit is LNA which is one of the crucial elements of RF receivers. They amplify RF signal to a particular level so that the sensitivity requirements of other components in RF receivers such as filters are met by RF signal as the signal received by the antenna is very small. Hence, it is important to amplify the signal as much as possible without noise addition and also; attaining good linearity, high gain and low power consumption at the same time. For designing of LNA, the most optimum tradeoff between various parameters has to be achieved. Also, the size of communication devices and power consumption should be as minimum as possible, which is possible nowadays because of advancements in integrated circuit (IC) technology. In this thesis, low noise amplifier topologies have been proposed to achieve high linearity while keeping the noise performance as good as possible and gain as high as possible. To achieve input impedance matching of 50 Ω, a pi-matched circuit is used at input. The proposed low noise amplifier topologies are designed for 2.4 GHz frequency. The circuits are implemented using 0.13 µm CMOS technology and is simulated using Advanced Design Simulation Software.