OPTIMIZED DESIGN OF LOGIC GATES USING MEMRISTOR AND THEIR APPLICATION TO DESIGN OF ANALOG DIGITAL DIFFERENTIAL AMPLIFIER

Abstract

The CMOS based devices have reached the Moore's limit and cannot be scaled down further; also there is not much improvement in the power consumption and the speed of these devices in past years. Research is going on to find a suitable alternative to CMOS based devices. Memristor is one such alternative to CMOS. This thesis gives a brief introduction of memristor and its modeling. Memristor digital logic gates have been designed and their application to design of analog digital differential amplifier presented based on memristor ratioed logic (MRL) in Cadence Virtuoso. Simulation results show that memristor based gates have a fast response time and less power consumption, which make them ideal for digital architecture design and a suitable alternative for CMOS designs. The focus of this research is on developing memristor-based applications at the circuit and architecture levels. Memristors are investigated from the point of view of circuit designer and computer architect, including describing the desired device for different applications.