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dc.contributor.authorSINGH, RAHUL-
dc.date.accessioned2017-06-15T04:19:01Z-
dc.date.available2017-06-15T04:19:01Z-
dc.date.issued2013-07-
dc.identifier.urihttp://dspace.dtu.ac.in:8080/jspui/handle/repository/15791-
dc.description.abstractIn the past few decades the minimum size of transistor has been downscaled according to the Moore's law. But now further downscaling of MOSFET is facing challenges like SCE(short channel effects), gate insulator tunnelling. To overcome these challenges FinFET, a type of multigate device, is the most promising device structure. FinFET technology has the calibre to continue with the Moore’s law. FinFET has started replacing conventional MOSFETs. The gate in FinFET is wrapped around a thin silicon fin for better control over the conducting channel i.e. fins. 3nm FinFET has been demonstrated in university labs. This thesis analyses the effects of variation in fin width, fin height, oxide thickness on the various device parameters like drain current(Ion), leakage current(Ioff), threshold voltage(Vt), DIBL and subthreshold swing(S) of FinFET by using simulation tools 3D Silvaco ATLAS version5.16.3.R and Devedit version 2.6.0.R.en_US
dc.language.isoenen_US
dc.relation.ispartofseriesTD-1298-A;-
dc.subjectTRIPLE GATE 3Den_US
dc.subjectFINFET STRUCTUREen_US
dc.subjectSIMULATIONen_US
dc.subjectATLASen_US
dc.subjectBOIen_US
dc.titleSIMULATION AND DESIGNING OF TRIPLE GATE 3D BOI (BODY ON INSULATOR) FINFET STRUCTURE USING ATLASen_US
dc.typeThesisen_US
Appears in Collections:M.E./M.Tech. Applied Physics

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