POWER MANAGEMENT FOR LARGE SCALE MEMORY SYSTEM

Abstract

We are increasingly seeing computer systems supporting larger and larger amounts of RAM, in order to meet workload demands. However, memory consumes a significant amount of power, potentially up to more than a third of total system power on server systems. So naturally, memory becomes the next big target for power management - on embedded systems and smart phones, and all the way up to large server systems. Most of the studies in the computer domain predict RAM usage in embedded systems and Personal computer to increase at very fast rate, RAM consumes 30-40% of power usage of a system. Modern memory hardware such as DDR3 support a number of power management capabilities - for instance, the memory controller can automatically put memory DIMMs/banks into content-preserving low-power states, if it detects that entire memory DIMM/bank has not been referenced for a threshold amount of time, thus reducing the energy consumption of the memory hardware. We term these power-manageable chunks of memory as "Memory Regions”. The OS needs to know about the granularity at which the hardware can perform automatic power-management of the memory banks (i.e., the address boundaries of the memory regions). On ARM platforms, the boot loader can be modified to pass on this info to the kernel via the device-tree. On x86 platforms, the new ACPI 5.0 spec has added support for exporting the power-management capabilities of the memory hardware to the OS in a standard way.