Please use this identifier to cite or link to this item: http://dspace.dtu.ac.in:8080/jspui/handle/repository/14876
Title: DESIGN & PERFORMANCE ANALYSIS OF MAC UNIT
Authors: SHAIKH, MOHAMMAD RIZWAN UDDIN
Keywords: MAC UNIT
CARRY SAVE ADDER
SIMILATION
ALU
Issue Date: Jun-2016
Series/Report no.: TD NO.1962;
Abstract: ALU is a central block in the computing devices, especially Digital Signal Processor (DSP). Basic ALU consists of arithmetic unit, logic unit and control unit.In order to achieve high performance MAC unit is incorporated in the design of ALU.MAC unit performsmultiplication and accumulation process. Basic MAC unitconsists of multiplier, adder, and accumulator.In the existing MAC unit designed using Dadda Multiplier and adder as Carry Save Adder (CSA). The proposed MAC unit designed using Dadda Multiplier and adder as Carry Increment Adder (CSA).However in the proposed model all traditional full adders are replaced by improved full adder. The performance analysis of MAC unit models in terms of area, delay and power is done.Various MAC unit models are designed using Verilog HDL. Simulation and synthesis are done using Xilinx ISE 12.2 for Virtex-6 family 40nm technology device. The power is calculated using Lattice Diamond Design suite software.
URI: http://dspace.dtu.ac.in:8080/jspui/handle/repository/14876
Appears in Collections:M.E./M.Tech. Electronics & Communication Engineering

Files in This Item:
File Description SizeFormat 
Thesis.pdf4.92 MBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.