LOW-POWER LOW-VOLTAGE ANALOG DESIGN

Abstract

ABSTRACT The increasing demand of portable electronics devices makes supply voltage and power consumption important design parameter. Over the years techniques such as sub-threshold and bulk-driven MOSFETs have been proposed to achieve low power operation. Floating Gate MOSFET (FGMOS) is also a low power, low voltage technique which overcome the limitations of above mentioned techniques. It has some notable features like threshold adjustment and multiple inputs floating gate which make it suitable for realizing analog circuits that can operate at lower supply voltages. Another low power technique is use of current mode circuits instead of conventional voltage mode circuits, which also offer higher speed of operation. In this work both FGMOS and current mode operations are combined to achieve low power operations. New structures of analog building blocks namely current differencing buffered amplifier (CDBA) and differential difference current conveyor (DDCC) are proposed which use FGMOS transistors in place of normal MOSFETs. The proposed FFGMOS based CDBA works for ±0.4V supply voltages with 374 μW power dissipation. This CDBA has current transfer ratio off 0.98 and voltage transfer ratio of 0.98. A second order high filter is implemented using proposed CDBA and verified through simulations. The simulations are done using TSMC 0.18 μm technology file. The proposed FGMOS based DDCC works for ±2V supply voltages. A full wave rectifier using the proposed DDCC is implemented and verified through simulation. The rectifier has -1V to 1V dynamic range of operations and rectifies the input almost without any loss. The simulations are done using 0.5 μm technology file. All the simulations are performed using PSPICE simulation software. It is found that simulated results are in harmony with the expected results.