DESIGNING A NAND FLASH INTERFACE I/O WHICH MEETS ALL THE SPECIFICATION OF ONFI 2.3

Abstract

ABSTRACT An interface is a tool and concept that refers to a point of interaction between components, and is applicable at the level of both hardware and software. This allows a component, whether a piece of hardware such as a graphic card or a piece of software such as an internet browser, to function independently while using interfaces to communicate with other components via an input /output system and an associated protocol. The Open NAND Flash Interface Working Group (ONFI) is a consortium of technology companies working to develop open standards for NAND flash memory chips and devices that communicate with them. The formation of ONFI was announced at the Intel Developer Forum in March 2006. The ONFI Working Group is dedicated to simplifying integration of NAND Flash memory into consumer electronics (CE) applications and computing platforms. ONFI 2.3 standard specifications were ratified in 16 AUG 2010 which includes the EZNAND protocol. EZ-NAND, which stands for error correction code (ECC) Zero NAND, was designed to remove the burden of the host controller to keep pace with the fast changing ECC requirements of NAND technology. Here In this thesis work, I design a NAND Flash Interface I/O which meets all the specifications of ONFI 2.3. This I/O design is working for data rate of 200 MHz with I/O supply voltage of 1.8V. I tested my design in ADE using SPECTRE as simulator.