Please use this identifier to cite or link to this item: http://dspace.dtu.ac.in:8080/jspui/handle/repository/13877
Title: DESIGN AND ANALYSIS OF HIGH EFFICIENCY LDMOS POWER AMPLIFIER
Authors: KHARBIKAR, TUSHAR N.
Keywords: LDMOS POWER AMPLIFIER
RF POWER AMPLIFIER
WORLDWIDE INTEROPERABILITY FOR MICROWAVE ACCESS
AMPLIFIER
Issue Date: 15-Dec-2011
Series/Report no.: TD 796;86
Abstract: Linearity and efficiency are the two most important characteristics of RF power amplifier. Both these characteristics are complementary to each other. One characteristic must be achieved in order to achieve other one. For future Worldwide Interoperability for Microwave Access (WiMAX) application which is intended to work on 3.5GHz frequency, linear power output is needed. To achieve high efficiency with the given output power requirement, Class AB is the only solution seen. In class AB amplifier, all harmonics are shorted to achieve desired performance. In practice, to achieve shorts at all harmonic frequencies is almost impossible. The most obvious solution for this problem is to tune the harmonics to achieve the desired results. Class J is one such topology of power amplifier. Here, second harmonic impedance is tuned so that fundamental and second harmonic assist each other to provide desired power output with increased efficiency. Silicon is cheapest semiconductor material available. Now-a-days, compound semiconductors such as Gallium Nitride (GaN), Gallium Arsenide (GaAs), Silicon Carbide (SiC) are occupying the market of devices for applications in frequency range above 2GHz. Si-LDMOS technology is promising technology emerged for design of power amplifiers below 1 GHz. Some recent research shows the usefulness of LDMOS technology at 2 GHz. This work focuses on designing a high efficiency power amplifier for 3.5GHz applications using Si-LDMOS technology. For this, NXP semiconductors’ BLF6G38S-25, a 25 W LDMOS power MOSFET is used. Two topologies are designed, Class AB and Class J. With Class AB amplifier, drain efficiency of 64% and power added efficiency (PAE) of 62.15% is achieved. The output power at this efficiency is 44.8dBm. Power back-off performance is good with PAE of 39.46%. Linearity of this power amplifier is in acceptable limit. Class J amplifier gives superior performance at same biased level and input power level. Maximum drain efficiency is 69.36% and PAE is 67.36% with output power of 44.7dBm is achieved for input power level of 23dBm. Power back-off performance is also better than corresponding class AB power amplifier with 49.6% PAE at 3dB back-off. Advanced Design System (ADS) v2008 Update 2 is used as platform for simulations.
Description: M.TECH
URI: http://dspace.dtu.ac.in:8080/jspui/handle/repository/13877
Appears in Collections:M.E./M.Tech. Electronics & Communication Engineering

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