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DC Field | Value | Language |
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dc.contributor.author | GUPTA, PIYUSH | - |
dc.date.accessioned | 2011-12-15T07:08:17Z | - |
dc.date.available | 2011-12-15T07:08:17Z | - |
dc.date.issued | 2011-12-15 | - |
dc.identifier.uri | http://dspace.dtu.ac.in:8080/jspui/handle/repository/13876 | - |
dc.description | M.TECH | en_US |
dc.description.abstract | The exponentially increasing demands for computationally intensive real-time signal processing applications outpace the performance improvements of each new generation of processors. With each passing year, more applications require tremendous computing capabilities that current processors cannot achieve. By coordinating the activities of individual processors, parallel processing offers the performance required by these applications. DSP applications are particularly suited for parallel processing because they are computationally intensive, highly parallel, highly structured, and often, periodic. Moreover, parallel multiprocessor systems have many benefits over single-processor systems. Parallel multiprocessor systems have virtually unlimited performance, better fault tolerance, scalability, flexibility, and upgradability. For these reasons, many high-end DSP applications, such as imaging, graphics, and data processing already benefit from parallel processing. | en_US |
dc.language.iso | en | en_US |
dc.relation.ispartofseries | TD 794;64 | - |
dc.subject | MSP430 | en_US |
dc.subject | VIRTEX-4 | en_US |
dc.subject | PARALLEL ARCHITECTURE | en_US |
dc.subject | SIGNAL PROCESSING | en_US |
dc.subject | PARALLEL MULTI PROCESSOR | en_US |
dc.title | DESIGN OF PARALLEL ARCHITECTURE USING MSP430 & VIRTEX-4 | en_US |
dc.type | Thesis | en_US |
Appears in Collections: | M.E./M.Tech. Electronics & Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
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front pages.pdf | COVER | 91.31 kB | Adobe PDF | View/Open |
thesis.pdf | MAIN | 815.96 kB | Adobe PDF | View/Open |
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