IMPLEMENTATION OF UNIVERSAL ASYNCHRONOUS TRANSMITTER RECIVER (UART) USING FPGA TECHNOLOGY

Abstract

The Universal Asynchronous Receiver and Transmitter (UART) is a single chip device that provides a half duplex Asynchronous Receiver and Transmitter and a Baud rate generator for serial communication. As a peripheral device of a microcomputer system, the UART receives parallel data from the CPU and transmits serial data after conversion. This device also receives serial data from the outside and transmits parallel data to the CPU after conversion. The Asynchronous Communication Element can support data rates from DC to 1.5 M Baud. The UART Asynchronous Communication Element (ACE) is a high performance programmable Universal Asynchronous Receiver/Transmitter (UART) and Baud Rate Generator (BRG) on a single chip (FPGA). The ACE’s receiver circuitry converts start, data, stop, and parity bits into a parallel data word. The transmitter circuitry converts a parallel data word into serial form and appends the start, parity, and stop bits. The word length is 8 data bits. 2 Stop Bits are provided. The Baud Rate Generator divides the clock by a divisor programmable from 1 to 216-1 to provide standard RS-232C baud rates when using any one of three industry standard baud rate crystals (1.8432MHz, 2.4576MHz, or 3.072MHz) or any other depending on the clock frequency will be used to the user as after implementing it onto FPGA the clock frequency of 92 MHz can be used. A programmable buffered clock output (BAUDOUT) provides either a buffered oscillator or 16X (16 times the data rate) baud rate clock for general purpose system use. iv