Please use this identifier to cite or link to this item: http://dspace.dtu.ac.in:8080/jspui/handle/repository/13595
Title: IMPLEMENTATION OF SHA ALGORITHM USING VHDL FOR HARDWARE SECURITY
Authors: MEENAKSHI
Keywords: FPGA
VHDL
SHA
Algorithm
Hardware Security
Issue Date: 3-Jan-2008
Series/Report no.: TD 383;111
Abstract: With introduction of new technologies inventors are more concerned about the security of the new inventions they are bringing out. Data security is becoming ever more important in embedded and portable electronic devices. External interfaces to memory in digital devices and communication interfaces to other digital devices are more vulnerable to probing. The principal goal guiding the design of any encryption algorithm must be security against unauthorized attacks. These technique were sufficient to prevent the unauthorized access of the device but if the attack is at the device interface level not to access the system but to get the knowledge of complete architecture of device, algorithm used etc. This is very serious security threat from IP (intellectual property) point of view. So nowadays apart from the user authentication check device architecture information and algorithm are encrypted so as to avoid any kind of reverse engineering. The analysis techniques used by atta...
Description: ME THESIS
URI: http://dspace.dtu.ac.in:8080/jspui/handle/repository/13595
Appears in Collections:M.E./M.Tech. Electronics & Communication Engineering

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