IMPLEMENTATION OF ADVANCED ENCRYPTION STANDARD(AES) IN VERILOG

Abstract

I will demonstrate, on a “Real-life” example, how a sound HDL technology can be used in conjunction with modern synthesis and simulation tool. The cipher Rijndael is one of the five finalists of the Advanced Encryption Standard. The algorithm has been designed by Joan Daemen and Vincent Rijmen and its specification is given in [1]. It is a block cipher. The length of the block and the length of the key can be specified to be 128, 192, 256 bits. In this project I’ll present the hardware implementation with 128-bit blocks and 128-bit keys, using FPGA (Field Programmable Gate Arrays). In this variant the cipher consists of 10 rounds. Rijndael is a block cipher that encrypts and decrypts 128, 192, and 256 bit blocks, using 128, 192, and 256 byte keys in any combination. The block is considered to be structured as 4, 6, or 8 columns of 4 bytes, depending on block size. The basic operations applied to the block are: 1.KeyAddittion: XORing each byte with a round key (done before the...