FPGA BASED SUPERVISORY CONTROL AND DATA ACQUISITION SYSTEM

Abstract

A prototype Supervisory Control and Data Acquisition (SCADA) System has been designed and programmed into the ACEX50K FPGA chip. The designed system provides the basic facilities of SCADA along with the advantages of great speed, high accuracy, negligible & predictable delay, no mechanical components, purely digitalized system facilitated by the FPGA. FPGA has excellent logic capabilities, enormous processing resources, and very high clock speed, therefore suitable for implementing data capture system. The system is implemented using UVLSI-201 trainer kit and a general-purpose input-output board. The analog data is acquired from eight multiplexed external channels provided on the GPIO board. Selecting a particular channel and addressing it for reading data, is the responsibility of FPGA. As FPGA can deal only with digital information, the analog data is converted to the digital form by ADC 0808 provided on the GPIO board. This ADC is FPGA controlled and the digital data is stored in FPGA by programming the device. The data is displayed on the GPIO board in hexadecimal form using multiplexed 4 digits, seven segment display. Data is processed and checked for any limit violation within the chip itself. If any limit violation is there, output LED glows, indicating a fault in the system. Also, a 5-volt analog control signal is generated to check the fault. The system has been modeled using VHDL, a hardware description language. 5