Collection's Items (Sorted by Submit Date in Descending order): 41 to 60 of 680
| Preview | Issue Date | Title | Author(s) |
| 2023-05 | DETECTION OF ATTRIBUTES MANIPULATION IN DEEP FAKE IMAGES USING HYBRIDLEARNING TECHNIQUE TO CLASSIFY INDIGENOUS AND FORGED IMAGES | GAHLOT, KANWARDEEP SINGH |
| 2021-07 | DESIGN AND COMPARISION OF DIFFERENT DOMINO TECHNIQUES | RAVISH, ANURAG |
| 2023-05 | DESIGN AND ANALYSIS OF DUAL BAND BIOMEDICAL ANTENNA FOR IMPLANTABLE APPLICATIONS | SONKAR, ANKIT KUMAR |
| 2022-05 | DESIGN AND ANALYSIS OF ANTENNA ARRAY ON CURVATURE SURFACE FOR 5G APPLICATIONS | SINGH, PRERNA |
| 2023-06 | DESIGN OF SPIKE PULSER FOR ULTRASONIC APPLICATIONS | JAIN, MANISHA |
| 2023-06 | DRIVABLE AREA DETECTION USING YOLOV7 | SHARMA, DHRUV |
| 2021-07 | CONVOLUTIONAL NETWORK FEATURE HIERARCHY FOR HYPER SPECTRAL IMAGE CLASSIFICATION | THAPLIYAL, ANKITA |
| 2023-05 | COMPOUND WIDEBAND RECONFIGURABLE ANTENNAS BASED ON PIN DIODES AND VO2 RF SWITCHES FOR C-BAND WIRELESS STANDARDS | SINGHAL, SPARSH |
| 2020-07 | AUTOMATION OF RTL TO GDS II DESIGN FLOW USING SCRIPT’S METHODOLOGY | JAIN, VISHESH |
| 2020-08 | VOLTAGE DIFFERENCING CURRENT CONVEYOR AND ITS APPLICATIONS IN IMPLEMENTATION OF FILTERS AND OSCILLATORS | GUPTA, CHARU |
| 2023-05 | KNOWLEDGE GENERATION AND TACTICAL SMALL OBJECT DETECTION | HOSAIN, MEHRAB |
| 2023-05 | DESIGNING OF RISC V ARCHITECTURE | KUMAWAT, VANSHIKA |
| 2023-05 | STUDY AND IMPLEMENTATION OF CONTINUOUS TIME APPLICATIONS OF VOLTAGE CONVEYER-II | DUTT, RAM |
| 2023-05 | MECHANICAL FAULT ANALYSIS AND DETECTION USING NON STATIONARY DECOMPOSITION FOR VIBRATION SIGNALS | BHANDARI, SONALIKA |
| 2023-05 | FPGA IMPLEMENTATION OF OPTIMIZED AES ALGORITHM FOR MULTIMEDIA MESSAGES | KALA, JAIDEEP |
| 2023-05 | IN-MEMORY COMPUTATION USING STATIC RANDOM ACCESS MEMORIES | SINGH, STUTI |
| 2023-06 | PREDICTION OF IMPULSE CONTROL DISORDERS IN PARKINSON’S DISEASE USING MACHINE LEARNING TECHNIQUES | SHWETA |
| 2023-05 | AXI BASED IP BLOCK VERIFICATION USING UVM A DISSERTATION REPORT | SAINI, SUMER |
| 2023-05 | STUDY OF LEAKAGE POWER REDUCTION TECHNIQUES IN CMOS CIRCUITS | JHA, RAVI RATAN |
| 2023-05 | DESIGN AND IMPLEMENTATION OF EFFICIENT MATRIX MULTIPLICATION USING VARIOUS ARCHITECTURE | KUMAR, SHIVAM |
Collection's Items (Sorted by Submit Date in Descending order): 41 to 60 of 680
