Collection's Items (Sorted by Submit Date in Descending order): 121 to 140 of 710
| Preview | Issue Date | Title | Author(s) |
| 2016-06 | SKETCH-FACE RECOGNITION USING HYBRID OF HOG AND GLCM FEATURE DESCRIPTORS | KUMAR, SANCHIT |
| 2022-05 | SIMULATION AND ANALYSIS OF OPTICAL LOGIC GATES | PRASAD, BHAVNA |
| 2019-08 | REALISATION OF THE OFCC BASED INSTRUMENTATION AMPLIFIER | KHARE, AYUSH |
| 2021-09 | LOW POWER ACCURACY CONFIGURABLE MULTIPLIER USING NEW CARRY MASKABLE ADDER AND FS-GDI TECHNIQUE | RAJKUMAR, GOLLU |
| 2022 | DESIGN OF HIGH STATIC NOISE MARGIN TRANSMISSION GATE BASED SRAM CELL | IBRAHIM, TARTEEL OSMAN ABDELMOULA |
| 2022-06 | STATIC LOW-POWER VERIFICATION OF SYSTEM-ON-CHIP (SoC) | SURYANSHU, KUMAR |
| 2022-05 | BLOCK LEVEL TIMING AND POWER OPTIMIZATION OF VLSI PHYSICAL DESIGN | GUPTA, SANDEEP KUMAR |
| 2022-05 | DESIGN AND ANALYSIS OF A ROBUST CODEC FOR WIRELESS CHANNEL USING MACHINE LEARNING | SHARAFUDEN, MOGAHED ADAM MOHAMED |
| 2020-08 | REALIZATION OF VDCC BASED PI, PD AND PID CONTROLLER | SINHA, TAMANNA |
| 2020-08 | ANALYSIS OF VDDDA BASED VOLTAGE-MODE MISO AND SIMO UNIVERSAL FILTER | GOEL, DHRUV |
| 2022-05 | DESIGN AND IMPLEMENTATION OF UART USING VERILOG | MISHRA, MANISHA |
| 2022-05 | HANDWRITTEN CHARACTER RECOGNITION OF ASSAMESE HANDWRITTEN RECOGNITION USING CONVOLUTION NEURAL NETWORK | ISLAM, ZAHIRUL |
| 2022-05 | IMPLEMENTATION OF DIGITAL MODULATIONS ASK, PSK AND FSK IN VERILOG USING VEDIC MULTIPLIERS | CHINTAMANENI, SRI HARSHA |
| 2022-05 | DESIGN AND ANALYSIS OF LOW POWER SRAM | DAS, KUNDAN KUMAR |
| 2022-05 | STUDY AND SIMULATION OF SECOND GENERATION VOLTAGE CONVEYOR AND ITS APPLICATION | GANGWAR, SUMIT |
| 2022-05 | DESIGNING OF 2:4 DECODER USING DIFFERENT LOGIC STYLES | AGGARWAL, POORVA |
| 2022-05 | IMPLEMENTATION OF HIGH PERFORMANCE ROUTER USING FSM, SYNCHRONIZER AND FIFO | SINGH, MANSHI |
| 2022-05 | EFFICIENT 16x16 VEDIC MULTIPLIER USING VARIOUS ADDERS | REDDY, YATHAM NAGA SAI HARSHEESWAR |
| 2022-05 | LOW POWER LOW NOISE PLL DESIGN | AGRAHARI, VISHAL |
| 2022-05 | DESIGN AND IMPLEMENTATION OF OPTIMISED MAGNITUDE COMPARATOR USING DIFFERENT LOGIC STYLES | RAY, RAKESH KUMAR |
Collection's Items (Sorted by Submit Date in Descending order): 121 to 140 of 710
