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A LOW POWER HIGH VOLTAGE HIGH FREQUENCY PULSER CIRCUIT DESIGN FOR DENTAL APPLICATION See

AYOLO-BASEDSYSTEMFORREAL-TIME DETECTIONOFDEFECTS INPRINTED CIRCUIT BOARDS See

DEEP LEARNING BASED PROPAGATION DELAY PREDICTION AND SENSITIVITY ANALYSIS OF CMOS LOGIC CIRCUITS See

FGMOS BASED VDTA REALIZATIONS WITH ENHANCED PERFORMANCE See

A CONFORMAL EBG-INTEGRATED MICROSTRIP PATCH ANTENNA FOR ENHANCED PERFORMANCE AT 2.4 GHZ ISM BAND See

SMART ECO FILL FOR FASTER DESIGN CYCLE AND DFM AT DEEP SUB-MICRON TECHNOLOGY See

MEMORY BUILT IN SELF TEST INSERTION IN SOC FOR TESTING AND VALIDATION See

HYBRID DEEP LEARNING BASED TIMING CHARACTERIZATION OF STANDARD CELL USING SLEW AND LOAD VARIATIONS See

STATIC CHECKS IN RTL DESIGN : ENSURING CODE QUALITY AND RELIABILITY See

NOVEL 13T SRAM CELL DESIGN: IMPROVED NOISE MARGIN & REDUCED DYNAMIC POWER USING 90NM GENERIC PROCESS DESIGN KIT (GPDK) See

DESIGN OF SINGLE CYCLE 32-BIT RISC-V PROCESSOR See

HETERO-DIELECTRIC NANOWIRE FET FOR RADIATION SENSING DOSIMETER APPLICATIONS See

DESIGN AND SIMULATION OF A POCKET-ENGINEERED DIELECTRIC-MODULATED TFET BIOSENSOR FOR LABEL-FREE BREAST CANCER DETECTION See

POWER INTEGRITY ENHANCEMENT IN ADVANCED ICS USING DECOUPLING CAPACITORS AND POWER GRID OPTIMIZATION See

DESIGN AND PERFORMANCE ANALYSIS OF GATE ALL AROUND NANOWIRE FET FOR SUPPRESSION OF SHORT CHANNEL EFFECTS See

ANALYSIS OF LOW-POWER 2:1 MULTIPLEXERUSING DMLANDLDMLTECHNIQUES See

DESIGN OF TERNARY FULL ADDER AND COMPARATOR USING GAA-CNTFET See

A MILLIMETER-WAVE ANTENNA DESIGN USING METASURFACE TECHNOLOGY FOR 5G APPLICATIONS See

DEVELOPMENT OF OPTIMAL ALGORITHMS FOR EMOTION RECOGNITION See

DESIGN AND SIMULATION OF HETERO-JUNCTION TUNNEL FET FOR BIOSENSING APPLICATION See

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